# Library script
# 
# Exported from /home/mcgregor/eagle/my_sbc/libs/M12L64164A-8T.lbr at  9/26/2007 19:16:14 
# 
# EAGLE Version 4.16r1 Copyright (c) 1988-2006 CadSoft
# 
Set Wire_Bend 2;
# Grid changed to 'mm' to avoid loss of precision!
Grid mm;
Layer   1 Top;
Layer   2 Route2;
Layer   3 Route3;
Layer   4 Route4;
Layer   5 Route5;
Layer   6 Route6;
Layer   7 Route7;
Layer   8 Route8;
Layer   9 Route9;
Layer  10 Route10;
Layer  11 Route11;
Layer  12 Route12;
Layer  13 Route13;
Layer  14 Route14;
Layer  15 Route15;
Layer  16 Bottom;
Layer  17 Pads;
Layer  18 Vias;
Layer  19 Unrouted;
Layer  20 Dimension;
Layer  21 tPlace;
Layer  22 bPlace;
Layer  23 tOrigins;
Layer  24 bOrigins;
Layer  25 tNames;
Layer  26 bNames;
Layer  27 tValues;
Layer  28 bValues;
Layer  29 tStop;
Layer  30 bStop;
Layer  31 tCream;
Layer  32 bCream;
Layer  33 tFinish;
Layer  34 bFinish;
Layer  35 tGlue;
Layer  36 bGlue;
Layer  37 tTest;
Layer  38 bTest;
Layer  39 tKeepout;
Layer  40 bKeepout;
Layer  41 tRestrict;
Layer  42 bRestrict;
Layer  43 vRestrict;
Layer  44 Drills;
Layer  45 Holes;
Layer  46 Milling;
Layer  47 Measures;
Layer  48 Document;
Layer  49 Reference;
Layer  51 tDocu;
Layer  52 bDocu;
Layer  91 Nets;
Layer  92 Busses;
Layer  93 Pins;
Layer  94 Symbols;
Layer  95 Names;
Layer  96 Values;
Description '';

Edit SDRAM_8MB.sym;
Pin 'A0' I/O None Middle R0 Both 0 (-17.78 33.02);
Pin 'A1' I/O None Middle R0 Both 0 (-17.78 30.48);
Pin 'A2' I/O None Middle R0 Both 0 (-17.78 27.94);
Pin 'A3' I/O None Middle R0 Both 0 (-17.78 25.4);
Pin 'A4' I/O None Middle R0 Both 0 (-17.78 22.86);
Pin 'A5' I/O None Middle R0 Both 0 (-17.78 20.32);
Pin 'A6' I/O None Middle R0 Both 0 (-17.78 17.78);
Pin 'A7' I/O None Middle R0 Both 0 (-17.78 15.24);
Pin 'A8' I/O None Middle R0 Both 0 (-17.78 12.7);
Pin 'A9' I/O None Middle R0 Both 0 (-17.78 10.16);
Pin 'A10' I/O None Middle R0 Both 0 (-17.78 7.62);
Pin 'A11' I/O None Middle R0 Both 0 (-17.78 5.08);
Pin 'A12/BA0' I/O None Middle R0 Both 0 (-17.78 2.54);
Pin 'D0' I/O None Middle R180 Both 0 (20.32 33.02);
Pin 'D1' I/O None Middle R180 Both 0 (20.32 30.48);
Pin 'D2' I/O None Middle R180 Both 0 (20.32 27.94);
Pin 'D3' I/O None Middle R180 Both 0 (20.32 25.4);
Pin 'D4' I/O None Middle R180 Both 0 (20.32 22.86);
Pin 'D5' I/O None Middle R180 Both 0 (20.32 20.32);
Pin 'D6' I/O None Middle R180 Both 0 (20.32 17.78);
Pin 'D7' I/O None Middle R180 Both 0 (20.32 15.24);
Pin 'D8' I/O None Middle R180 Both 0 (20.32 12.7);
Pin 'D9' I/O None Middle R180 Both 0 (20.32 10.16);
Pin 'D10' I/O None Middle R180 Both 0 (20.32 7.62);
Pin 'D11' I/O None Middle R180 Both 0 (20.32 5.08);
Pin 'D12' I/O None Middle R180 Both 0 (20.32 2.54);
Pin 'D13' I/O None Middle R180 Both 0 (20.32 0);
Pin 'D14' I/O None Middle R180 Both 0 (20.32 -2.54);
Pin 'D15' I/O None Middle R180 Both 0 (20.32 -5.08);
Pin 'VDD@1' Pwr None Middle R0 Both 0 (-17.78 -5.08);
Pin 'VDD@2' Pwr None Middle R0 Both 0 (-17.78 -7.62);
Pin 'VDD@3' Pwr None Middle R0 Both 0 (-17.78 -10.16);
Pin 'VDD@4' Pwr None Middle R0 Both 0 (-17.78 -12.7);
Pin 'VDD@5' Pwr None Middle R0 Both 0 (-17.78 -15.24);
Pin 'VDD@6' Pwr None Middle R0 Both 0 (-17.78 -17.78);
Pin 'VDD@7' Pwr None Middle R0 Both 0 (-17.78 -20.32);
Pin 'GND@1' Pwr None Middle R0 Both 0 (-17.78 -25.4);
Pin 'GND@2' Pwr None Middle R0 Both 0 (-17.78 -27.94);
Pin 'GND@3' Pwr None Middle R0 Both 0 (-17.78 -30.48);
Pin 'GND@4' Pwr None Middle R0 Both 0 (-17.78 -33.02);
Pin 'GND@5' Pwr None Middle R0 Both 0 (-17.78 -35.56);
Pin 'GND@6' Pwr None Middle R0 Both 0 (-17.78 -38.1);
Pin 'GND@7' Pwr None Middle R0 Both 0 (-17.78 -40.64);
Pin 'LDQM' I/O None Middle R180 Both 0 (20.32 -10.16);
Pin 'WE' I/O None Middle R180 Both 0 (20.32 -12.7);
Pin 'CAS' I/O None Middle R180 Both 0 (20.32 -15.24);
Pin 'RAS' I/O None Middle R180 Both 0 (20.32 -17.78);
Pin 'CS' I/O None Middle R180 Both 0 (20.32 -20.32);
Pin 'NC1' I/O None Middle R180 Both 0 (20.32 -22.86);
Pin 'NC2' I/O None Middle R180 Both 0 (20.32 -25.4);
Pin 'A13/BA1' I/O None Middle R0 Both 0 (-17.78 0);
Pin 'UDQM' I/O None Middle R180 Both 0 (20.32 -30.48);
Pin 'CLK' I/O None Middle R180 Both 0 (20.32 -33.02);
Pin 'CKE' I/O None Middle R180 Both 0 (20.32 -35.56);
Layer 94;
Change Style Continuous;
Wire  0.254 (-12.7 35.56) (15.24 35.56) (15.24 -43.18) (-12.7 -43.18) \
      (-12.7 35.56);
Layer 94;
Change Size 5.08;
Change Ratio 8;
Change Font Proportional;
Text 'SDRAM' R90 (5.08 -25.4);
Layer 94;
Change Size 5.08;
Change Ratio 8;
Text '8MB' R90 (5.08 2.54);

Edit TSOP54.pac;
Description '';
Layer 1;
Smd '1' 0.508 1.651 -0 R0 (-0.0508 -1.1176);
Layer 1;
Smd '2' 0.508 1.651 -0 R0 (0.762 -1.1176);
Layer 1;
Smd '3' 0.508 1.651 -0 R0 (1.5748 -1.1176);
Layer 1;
Smd '4' 0.508 1.651 -0 R0 (2.3876 -1.1176);
Layer 1;
Smd '5' 0.508 1.651 -0 R0 (3.2004 -1.1176);
Layer 1;
Smd '6' 0.508 1.651 -0 R0 (4.0132 -1.1176);
Layer 1;
Smd '7' 0.508 1.651 -0 R0 (4.826 -1.1176);
Layer 1;
Smd '8' 0.508 1.651 -0 R0 (5.6388 -1.1176);
Layer 1;
Smd '9' 0.508 1.651 -0 R0 (6.4516 -1.1176);
Layer 1;
Smd '10' 0.508 1.651 -0 R0 (7.2644 -1.1176);
Layer 1;
Smd '11' 0.508 1.651 -0 R0 (8.0772 -1.1176);
Layer 1;
Smd '12' 0.508 1.651 -0 R0 (8.89 -1.1176);
Layer 1;
Smd '13' 0.508 1.651 -0 R0 (9.7028 -1.1176);
Layer 1;
Smd '14' 0.508 1.651 -0 R0 (10.5156 -1.1176);
Layer 1;
Smd '15' 0.508 1.651 -0 R0 (11.3284 -1.1176);
Layer 1;
Smd '16' 0.508 1.651 -0 R0 (12.1412 -1.1176);
Layer 1;
Smd '17' 0.508 1.651 -0 R0 (12.954 -1.1176);
Layer 1;
Smd '18' 0.508 1.651 -0 R0 (13.7668 -1.1176);
Layer 1;
Smd '19' 0.508 1.651 -0 R0 (14.5796 -1.1176);
Layer 1;
Smd '20' 0.508 1.651 -0 R0 (15.3924 -1.1176);
Layer 1;
Smd '21' 0.508 1.651 -0 R0 (16.2052 -1.1176);
Layer 1;
Smd '22' 0.508 1.651 -0 R0 (17.018 -1.1176);
Layer 1;
Smd '23' 0.508 1.651 -0 R0 (17.8308 -1.1176);
Layer 1;
Smd '24' 0.508 1.651 -0 R0 (18.6436 -1.1176);
Layer 1;
Smd '25' 0.508 1.651 -0 R0 (19.4564 -1.1176);
Layer 1;
Smd '26' 0.508 1.651 -0 R0 (20.2692 -1.1176);
Layer 1;
Smd '27' 0.508 1.651 -0 R0 (21.082 -1.1176);
Layer 1;
Smd '28' 0.508 1.651 -0 R180 (21.082 10.0076);
Layer 1;
Smd '29' 0.508 1.651 -0 R180 (20.2692 10.0076);
Layer 1;
Smd '30' 0.508 1.651 -0 R180 (19.4564 10.0076);
Layer 1;
Smd '31' 0.508 1.651 -0 R180 (18.6436 10.0076);
Layer 1;
Smd '32' 0.508 1.651 -0 R180 (17.8308 10.0076);
Layer 1;
Smd '33' 0.508 1.651 -0 R180 (17.018 10.0076);
Layer 1;
Smd '34' 0.508 1.651 -0 R180 (16.2052 10.0076);
Layer 1;
Smd '35' 0.508 1.651 -0 R180 (15.3924 10.0076);
Layer 1;
Smd '36' 0.508 1.651 -0 R180 (14.5796 10.0076);
Layer 1;
Smd '37' 0.508 1.651 -0 R180 (13.7668 10.0076);
Layer 1;
Smd '38' 0.508 1.651 -0 R180 (12.954 10.0076);
Layer 1;
Smd '39' 0.508 1.651 -0 R180 (12.1412 10.0076);
Layer 1;
Smd '40' 0.508 1.651 -0 R180 (11.3284 10.0076);
Layer 1;
Smd '41' 0.508 1.651 -0 R180 (10.5156 10.0076);
Layer 1;
Smd '42' 0.508 1.651 -0 R180 (9.7028 10.0076);
Layer 1;
Smd '43' 0.508 1.651 -0 R180 (8.89 10.0076);
Layer 1;
Smd '44' 0.508 1.651 -0 R180 (8.0772 10.0076);
Layer 1;
Smd '45' 0.508 1.651 -0 R180 (7.2644 10.0076);
Layer 1;
Smd '46' 0.508 1.651 -0 R180 (6.4516 10.0076);
Layer 1;
Smd '47' 0.508 1.651 -0 R180 (5.6388 10.0076);
Layer 1;
Smd '48' 0.508 1.651 -0 R180 (4.826 10.0076);
Layer 1;
Smd '49' 0.508 1.651 -0 R180 (4.0132 10.0076);
Layer 1;
Smd '50' 0.508 1.651 -0 R180 (3.2004 10.0076);
Layer 1;
Smd '51' 0.508 1.651 -0 R180 (2.3876 10.0076);
Layer 1;
Smd '52' 0.508 1.651 -0 R180 (1.5748 10.0076);
Layer 1;
Smd '53' 0.508 1.651 -0 R180 (0.762 10.0076);
Layer 1;
Smd '54' 0.508 1.651 -0 R180 (-0.0508 10.0076);
Layer 21;
Wire  0.127 (-0.7112 8.9916) (21.7932 8.9916) (21.7932 -0.0508) (-0.7112 -0.0508) \
      (-0.7112 5.842) (-0.7112 8.9916);
Layer 21;
Circle 0.127 (0.0508 0.8128) (0.4603 0.8128);
Layer 21;
Wire  0.127 (-0.7112 5.842) -180 (-0.6096 3.1496);
Layer 21;
Change Size 1.27;
Change Ratio 8;
Text 'SDRAM 8MB' R0 (4.8768 3.8608);

Edit SDRAM.dev;
Prefix '';
Description '\
M12L64164A-8T\n\
8M x 16Bit SDRAM\n\
by Grzegorz Rajtar <mcgregor@blackmesaeast.com.pl>';
Value Off;
Add SDRAM_8MB 'G$1' Next 0 (0 0);
Package 'TSOP54' '''''';
Technology  '';
Connect  'G$1.VDD@1' '1'  'G$1.D0' '2'  'G$1.VDD@2' '3'  'G$1.D1' '4'  'G$1.D2' '5' \
         'G$1.GND@1' '6'  'G$1.D3' '7'  'G$1.D4' '8'  'G$1.VDD@3' '9'  'G$1.D5' '10'  'G$1.D6' '11' \
         'G$1.GND@2' '12'  'G$1.D7' '13'  'G$1.VDD@4' '14'  'G$1.LDQM' '15'  'G$1.WE' '16'  'G$1.CAS' '17' \
         'G$1.RAS' '18'  'G$1.CS' '19'  'G$1.A13/BA1' '20'  'G$1.A12/BA0' '21'  'G$1.A10' '22'  'G$1.A0' '23' \
         'G$1.A1' '24'  'G$1.A2' '25'  'G$1.A3' '26'  'G$1.VDD@5' '27'  'G$1.GND@3' '28'  'G$1.A4' '29' \
         'G$1.A5' '30'  'G$1.A6' '31'  'G$1.A7' '32'  'G$1.A8' '33'  'G$1.A9' '34'  'G$1.A11' '35' \
         'G$1.NC1' '36'  'G$1.CKE' '37'  'G$1.CLK' '38'  'G$1.UDQM' '39'  'G$1.NC2' '40'  'G$1.GND@4' '41' \
         'G$1.D8' '42'  'G$1.VDD@6' '43'  'G$1.D9' '44'  'G$1.D10' '45'  'G$1.GND@5' '46'  'G$1.D11' '47' \
         'G$1.D12' '48'  'G$1.VDD@7' '49'  'G$1.D13' '50'  'G$1.D14' '51'  'G$1.GND@6' '52'  'G$1.D15' '53' \
         'G$1.GND@7' '54';
Grid inch;